News & Insights
Ventana Is Top 10 Hot Semiconductor Company To Watch In 2023
As Arm gains more support from major cloud service providers, Ventana Micro Systems is hoping to disrupt the Arm and x86 worlds with data center chips that are based on RISC-V, an open-standard, royalty-free instruction set architecture backed by the likes of Intel, Google and Qualcomm.
Finally, a Company Shows You Can Have a High-performance RISC-V Solution with RAS Capabilities
Over the past six months, the company shared with me some of the details of its plans that seemed quite compelling. This week at the RISC-V Summit the company officially announced what had been in stealth for years- Veyron, what the company calls “the world’s first datacenter-class RISC-V CPU.”
Ventana RISC-V CPUs Beating Next Generation Intel Sapphire Rapids!
Last week we attended the RISC-V Summit in San Jose. Traction in the RISC-V ecosystem is accelerating faster and faster. The embedded world has shipped 10’s billions of RISC-V cores collectively over the last few years.
Ventana Interview at RISC-V Summit NA 2022
CEO Balaji Baktha at the Risk-V Summit North America 2022 discusses how Venata Micro has brought Risc-V to the Data Center Class.
Ventana Veyron Scales to 192 Cores
Startup Ventana has revealed Veyron, its RISC-V compute chiplet for server processors. Performance of a Veyron-based processor could rival that of server processors from AMD and Intel.
Ventana Plans to Bring RISC-V Chip to HPC
The ability to spin up custom chip designs at a lower cost has made the RISC-V architecture attractive for devices that don’t require cutting edge chips.
Exclusive CEO Interview: Latest Funding Drives Ventana’s First RISC-V Chiplets in Data Centers
Ever since Ventana Micro Systems came out of stealth last year, the company has been busily developing relationships with partners and potential customers to create traction for its RISC-V–based chiplets.
RISC-V Pushes Into The Mainstream
RISC-V cores are beginning to show up in heterogeneous SoCs and packages, shifting from one-off standalone designs toward mainstream applications where they are used for everything from accelerators and extra processing cores to security applications.
Ventana Micro Launches Server-Class RISC-V CPU, Challenging Arm
The semiconductor industry is on the verge of a major transition to chiplet-based designs and domain-specific solutions.
Ventana Unveils RISC-V CPU Compute Chiplet for Data Center
Ventana Micro Systems has announced its Veyron family of data-center class RISC-V processors, which will be offered in the form of high performance chiplets and IP. The first processor in this family, the Veyron V1, was announced at this week’s RISC-V Summit by Ventana founder and CEO Balaji Baktha.
Ventana Reveals RISC-V CPU Compute Chiplet for Data Center
Ventana Micro Systems has announced its Veyron family of data-center class RISC-V processors, which will be offered in the form of high performance chiplets and IP. The first processor in this family, the Veyron V1, was announced at this week’s RISC-V Summit by Ventana founder and CEO Balaji Baktha.
Ventana Launches RISC-V for Data Center with Veyron
Over the past six months, the company shared with me some of the details of its plans that seemed quite compelling. This week at the RISC-V Summit the company officially announced what had been in stealth for years- Veyron, what the company calls “the world’s first datacenter-class RISC-V CPU.”
Ventana Unveils RISC-V CPUs for Data Centers
Ventana Micro Systems Inc. has unveiled its Veyron family of high-performance data-center-class RISC-V CPUs. The company claims the first family member, the Veyron V1, is the highest performance RISC-V processor available today, running at 3.6-MHz in 5-nm process technology.
Ventana Targets Hyperscalers with Customizable RISC-V Server Chip
Ventana Micro Systems is set to unveil a family of datacenter-class processors based on the RISC-V architecture, which it claims will allow buyers to customize the chips to meet their requirements by combining Ventana's CPU cores with other silicon.
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