Ventana Micro Systems Inc., provider of the highest performance RISC-V processors, today announced its Founder and CEO Balaji Baktha is providing the RISC-V Summit Europe keynote speech at 10:00am on June 6. Ventana will be showcasing its Veyron product family in Booth 15 at the conference in Barcelona, Spain.
At this inaugural European semiconductor event, Ventana will share its vision, expertise, and real-world examples of how RISC-V technology is transforming compute architectures. The company will also highlight the significant impact RISC-V is having today and its promising future in the European semiconductor industry, particularly in the ability for RISC-V to enable Europe to participate in the next phase of data center and automotive innovation.
RISC-V Summit Europe is a premier event that brings together leading experts, researchers, and industry leaders to discuss the latest developments in RISC-V architecture. This gathering offers an ideal opportunity for Ventana to showcase its cutting-edge solutions and its commitment to driving innovation in this field.
In addition to Baktha's keynote at RISC-V Summit Europe, Kumar Sankaran, Vice President of Software and Platform Engineering at Ventana, will be offering a demo titled "Data Center Workloads on RISC-V" for attendees.
"RISC-V and chiplets represent a pivotal turning point in the semiconductor industry, empowering companies to leverage open-standards architecture and unleash their creativity,” said Baktha. “It is revolutionizing the way we design and build processors, enabling scalable and customizable solutions across diverse applications, including Data Center, Automotive, 5G, Generative AI, and Client applications. At Ventana, we believe in the transformative power of RISC-V.”
Ventana recently announced the Veyron RISC-V processors. Veyron V1 is the highest performance RISC-V processor available today, and offers high-performance 5nm chiplets and availability as IP. Veyron's efficient microarchitecture provides the highest single socket performance among competing server architectures, and enables workload efficiency gains through domain-specific acceleration, resulting in further innovation and optimization of workloads. The standards-based Veyron compute chiplet and reference platform provides market acceleration of up to two years and reduces development costs by up to 75%.