press releases
Ventana Announces 2025 Shipments of Veyron V2 Platform with Broad Market Adoption
Leading Hyperscalers and HPC Customers Embrace the Open, Scalable, Standards-Based Veyron V2 Accelerated Compute Platform to Power AI, Data Center, and Emerging Workloads
CUPERTINO, Calif. — October 21, 2024 - Ventana Micro Systems Inc., a leader in high-performance RISC-V platforms, today announced that Veyron V2, its flagship accelerated compute platform, will begin shipping in 2025 to address the growing demands of data centers for AI and domain-specific computing. With commitments from leading hyperscalers and HPC customers in the Americas, Europe, and Asia, Ventana’s Veyron V2 platform is gaining traction as the industry’s most powerful scalable RISC-V compute platform.
To meet with the Ventana team and learn more about Veyron V2 during the RISC-V Summit in Santa Clara, please email info@ventanamicro.com or visit us at our presentations throughout the event.
Veyron V2: A Scalable Platform to Accelerate AI and More
The Veyron V2 platform builds on Ventana’s RISC-V leadership by offering accelerated compute capabilities that empower customers to innovate and accelerate AI and domain-specific applications. With the flexibility to integrate accelerators and third-party IP, Veyron V2 helps organizations achieve unmatched performance and energy efficiency across applications, including data center, automotive, client and intelligent edge.
“Our Veyron V2 platform isn’t just a high-performance CPU—it’s a foundation for scalable, accelerated compute solutions that enable AI and other next-generation workloads,” said Balaji Baktha, Founder and CEO of Ventana.
Ventana at the RISC-V Summit: Where to Find Us
Join Ventana at the RISC-V Summit in Santa Clara from October 21-23 and learn more about our platform solutions at the following sessions:
- “Sailing Toward a Single Source of Truth”
- Speakers: Paul Clarke (Ventana) & Derek Hower (Qualcomm)
- Date: Mon., Oct. 21
- Time: 12:00 (noon)
- Location: Grand Ballroom H (Level 1)
- “Privileged Software Horizontal Committee Annual Update”
- Speaker: Anup Patel (Ventana)
- Date: Mon., Oct. 21
- Time: 3:00pm
- Location: Theater (Level 2)
- Reception Presentation: “Market Adoption of RISC-V in Data Center and HPC”
- Balaji Baktha, Founder & CEO, Ventana
- Date: Tue., Oct. 22
- Time: 5:30pm
- Location: Exhibit Hall A
- “RISC-V ACPI Is Ready for Server Platforms”
- Speakers: Sunil V. L. & Himanshu Chauhan (Ventana)
- Date: Wed., Oct. 23
- Time: 11:50am
- Location: Grand Ballroom H (Level 1)
- “RISC-V RAS Error-Record Register Interface (RERI)”
- Speaker: Greg Favor, CTO, Ventana
- Date: Wed., Oct. 23
- Time: 2:15pm
- Location: Grand Ballroom H (Level 1)
- Keynote Panel: “The Future of High Performance Computing is RISC-V”
- Speaker: Travis Lanier, Chief Product Officer, Ventana
- Date: Wed., Oct. 23
- Time: 3:55pm
- Location: Mission City Ballroom B2-B5 (Level 1)
Platform Features of Veyron V2: Driving Innovation and Scalability
- Performance Leadership Across Architectures:
Veyron V2 delivers the highest-performance RISC-V CPU, designed to compete head-to-head with the latest x86 and Arm processors, giving customers an open and flexible alternative for high-performance workloads. - RVA23 Compatibility and Advanced Virtualization:
Full support for the RVA23 profile enables cutting-edge hypervisor capabilities to optimize workload management in virtualized environments. - AI-Optimized Compute with Vector and Matrix Units:
Equipped with a high-performance vector unit and integrated matrix math acceleration, Veyron V2 is built to excel in AI workloads and other compute-intensive applications. - Modular Design for Accelerated Innovation:
Customers can integrate domain-specific acceleration such as AI into the Veyron platform, enabling tailored solutions for data center, automotive, client and intelligent edge applications. - Reduced Time-to-Market and Cost:
Leveraging Ventana’s UCIe-based chiplet architecture, Veyron V2 enables up to 75% cost savings and accelerates time-to-market by up to two years for solutions integrating domain specific acceleration.
